DAS  3.1.6 - 18/09/2017
DSCUD.H
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1 /*
2 
3  DSCUD.H
4 
5  Diamond Systems Corporation Universal Driver
6  Version 5.1
7 
8  Copyright (c) Diamond Systems Corporation 2002.
9  All Rights Reserved.
10 
11  http://www.diamondsystems.com
12 
13  DSCUD currently supports these boards:
14 
15  DALI SERVER INTERFACE
16  DIAMOND-MM
17  DIAMOND-MM-16
18  DIAMOND-MM-16-AT
19  DIAMOND-MM-32
20  DIAMOND-MM-AT
21  EMERALD-MM-8
22  EMERALD-MM-DIO
23  GARNET-MM
24  ONYX-MM
25  ONYX-MM-DIO
26  OPAL-MM
27  PEARL-MM
28  PROMETHEUS
29  QUARTZ-MM
30  RUBY-MM
31  RUBY-MM-416
32  RUBY-MM-1612
33  ZIRCON-MM
34 
35 */
36 
37 
38 #ifndef _DSCUD_H
39 #define _DSCUD_H
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 
46 /*/////////////////////////////////////////////////////////////////
53 
54 #ifndef BYTE
55 #define BYTE unsigned char
56 #endif
57 
58 
59 #ifndef SBYTE
60 #define SBYTE signed char
61 #endif
62 
63 
64 #ifndef WORD
65 #define WORD unsigned short
66 #endif
67 
68 
69 #ifndef SWORD
70 #define SWORD signed short
71 #endif
72 
73 
74 #ifndef DWORD
75 #define DWORD unsigned long
76 #endif
77 
78 
79 #ifndef SDWORD
80 #define SDWORD signed long
81 #endif
82 
83 
84 #ifndef LONG
85 #define LONG signed long
86 #endif
87 
88 
89 #ifndef FLOAT
90 #define FLOAT float
91 #endif
92 
93 
94 #ifndef DFLOAT
95 #define DFLOAT long double
96 #endif
97 
98 
99 #ifndef BOOL
100 #define BOOL int
101 #endif
102 
103 
104 #ifndef TRUE
105 #define TRUE ((BOOL)1)
106 #endif
107 
108 
109 #ifndef FALSE
110 #define FALSE ((BOOL)0)
111 #endif
112 
113 
114 #ifndef DSCSAMPLE
115 #define DSCSAMPLE SWORD
116 #endif
117 
118 #ifndef DSCDACODE
119 #define DSCDACODE DWORD
120 #endif
121 
122 typedef void (*DSCUserInterruptFunction) (void* parameter);
123 
124 #ifdef WIN32
125 #define DSCUDAPICALL __declspec(dllexport)
126 #else /* WIN32 not defined */
127 #define DSCUDAPICALL
128 #endif /* #ifdef WIN32 */
129 
130 
131 #ifndef FAR
132 #ifdef WIN32
133 #define FAR
134 #else /* #ifdef WIN32 */
135 #define FAR _far
136 #endif /* #ifdef WIN32 */
137 #endif /* #ifndef FAR */
138 
139 
140 #define DSCB SWORD
141 
142 
143 /*/////////////////////////////////////////////////////////////////
150 
151 /*///////////
152 // Version //
154 
155 #define DSC_VERSION 0x0510 /* 0xVVRR - Version & Revision */
156 
157 /*///////////////
158 // Board Types //
160 
161 #define DSC_DMM16 0
162 #define DSC_RMM 1
163 #define DSC_TMM 2
164 #define DSC_OPMM 3
165 #define DSC_DMM 4
166 #define DSC_SMM 5
167 #define DSC_GMM 6
168 #define DSC_QMM 7
169 #define DSC_ZMM 8
170 #define DSC_PMM 9
171 #define DSC_OMM 10
172 #define DSC_RMM416 11
173 #define DSC_DMM32 12
174 #define DSC_EMMDIO 13
175 #define DSC_RMM1612 14
176 #define DSC_DMMAT 15
177 #define DSC_DMM16AT 16
178 #define DSC_IR104 17
179 #define DSC_EMM8 18
180 #define DSC_PROM 19
181 #define DSC_DALI 20
182 #define DSC_OMMDIO 21
183 #define DSC_DRVR 255
184 
185 /*//////////////////////
186 // A/D Mode Constants //
188 
189 #define RANGE_5 0
190 #define RANGE_10 1
191 
192 #define BIPOLAR 0
193 #define UNIPOLAR 1
194 
195 #define GAIN_1 0
196 #define GAIN_2 1
197 #define GAIN_4 2
198 #define GAIN_8 3
199 #define GAIN_10 1 /* higher gains for SMM boards */
200 #define GAIN_100 2
201 #define GAIN_1000 3
202 
203 /*/////////////////////
204 // DALI default port //
206 
207 #define DSC_DALI_DEFAULT_PORT 4444
208 
209 /*/////////////
210 // GMM modes //
212 
213 #define MODE_0_INT11_INT12 0
214 #define MODE_0_INT21_INT22 1
215 #define MODE_1_82C55_1_C0 2
216 #define MODE_1_82C55_1_C3 3
217 #define MODE_1_82C55_2_C0 4
218 #define MODE_1_82C55_2_C3 5
219 
220 /*///////////////
221 // OMM sources //
223 
224 #define SOURCE_82C55_1_C0 0
225 #define SOURCE_COUNTER_0 1
226 #define SOURCE_82C55_2_C0 2
227 #define SOURCE_COUNTER_1 3
228 #define SOURCE_EXTERNAL 4
229 #define SOURCE_COUNTER_2 5
230 
231 #define OMM_SOURCE_PIN 0
232 #define OMM_SOURCE_CLOCK 1
233 #define OMM_SOURCE_OUT 2
234 
235 
236 /*////////////////////////////////////////
237 // Prometheus Watchdog Option Constants //
239 
240 /* Look in ZFx86 Training Book for details */
241 
242 #define PROM_WD_TRIGGER_SCI 0x01
243 #define PROM_WD_TRIGGER_NMI 0x02
244 #define PROM_WD_TRIGGER_SMI 0x04
245 #define PROM_WD_TRIGGER_RESET 0x08
246 #define PROM_WD_WDI_ASSERT_FALLING_EDGE 0x10
247 #define PROM_WD_WDO_TRIGGERED_EARLY 0x20
248 #define PROM_WD_ENABLE_WDI_ASSERTION 0x40
249 
250 /*/////////////////////////////
251 // Interrupt Operation Types //
253 
254 #define OP_TYPE_NONE 0
255 #define OP_TYPE_INT 1
256 #define OP_TYPE_DMA 2
257 
258 /*////////////////////////
259 // User Interrupt Modes //
261 
262 #define USER_INT_CANCEL 0
263 #define USER_INT_AFTER 1
264 #define USER_INT_INSTEAD 2
265 
266 #define USER_INT_SOURCE_EXTERNAL 1
267 #define USER_INT_SOURCE_INTERNAL 0
268 
269 /*///////////////
270 // Error Codes //
272 
273 #define DE_NONE 0 /* no error */
274 #define DE_HW_FAILURE 1 /* hardware failed */
275 #define DE_SW_FAILURE 2 /* software failed */
276 #define DE_HW_NOT_SUPPORTED 3 /* could not perform operation on this board */
277 #define DE_SW_NOT_SUPPORTED 4 /* software does not yet support this operation */
278 #define DE_INVALID_PARM 5 /* a parameter to the function is invalid */
279 #define DE_ALTERNATE_IN_PROGRESS 6 /* alternate interrupt function in progress */
280 #define DE_NONE_IN_PROGRESS 7 /* no interrupt function in progress to pause/cancel/resume */
281 #define DE_BUFFER_ROLLOVER 8 /* pointer passed in + sizeof data to be written would roll over a segment */
282 #define DE_ALREADY_PAUSED 10 /* can't pause an operation--it's already paused */
283 #define DE_OVERFLOW 11 /* Am9513A counter function overflowed */
284 #define DE_INVALID_FUNC 12 /* Function number not recognized by board type */
285 #define DE_DSCUDH_INVALID 13 /* Header - Library version mismatch */
286 #define DE_INVALID_BOARD 14 /* Invalid board-type constant */
287 #define DE_BOARD_LIMIT_REACHED 15 /* Tried to initialize too many boards at once */
288 #define DE_BOARD_BUSY 16 /* Attempt to acquire the board timed out */
289 #define DE_INVALID_WINDRVR_HANDLE 17 /* Windriver initialization failed */
290 #define DE_INVALID_WINDRVR_VERSION 18 /* Windriver version conflict */
291 #define DE_BAD_WINDRVR_BOARD_INIT 19 /* Windriver could not initialize the board */
292 #define DE_OPERATION_TIMED_OUT 20 /* Operation timed out */
293 #define DE_INVALID_WINDRVR_KP 21 /* Windriver kernel plugin initialization failed */
294 #define DE_THREAD_FAILURE 22 /* Windriver failed to initialize thread */
295 #define DE_DALI_ERROR 23 /* DALI Error, must print out error string to see details */
296 
297 /*/////////////////
298 // Error Strings //
300 
301 #define STR_DE_NONE "NO ERRORS REPORTED"
302 #define STR_DE_HW_FAILURE "HARDWARE FAILURE"
303 #define STR_DE_SW_FAILURE "SOFTWARE FAILURE"
304 #define STR_DE_HW_NOT_SUPPORTED "OPERATION NOT SUPPORTED BY HARDWARE"
305 #define STR_DE_SW_NOT_SUPPORTED "OPERATION NOT SUPPORTED BY SOFTWARE"
306 #define STR_DE_INVALID_PARM "INVALID PARAMETER"
307 #define STR_DE_ALTERNATE_IN_PROGRESS "ALTERNATE INTERRUPT OPERATION IN PROGRESS"
308 #define STR_DE_NONE_IN_PROGRESS "NO INTERRUPT OPERATION IN PROGRESS"
309 #define STR_DE_BUFFER_ROLLOVER "POINTER + SIZE OF DATA OVERRUN BUFFER"
310 #define STR_DE_ALREADY_PAUSED "OPERATION ALREADY PAUSED"
311 #define STR_DE_OVERFLOW "AM9513A COUNTER FUNCTION OVERFLOWED OR BUFFER OVERFLOW"
312 #define STR_DE_INVALID_FUNC "INVALID FUNCTION FOR SELECTED BOARD"
313 #define STR_DE_DSCUDH_INVALID "LIBRARY HEADER VERSION MISMATCH"
314 #define STR_DE_INVALID_BOARD "INVALID BOARD TYPE SPECIFIED"
315 #define STR_DE_BOARD_LIMIT_REACHED "MAXIMUM NUMBER OF BOARDS REACHED"
316 #define STR_DE_BOARD_BUSY "ATTEMPT TO ACQUIRE BOARD TIMED OUT"
317 #define STR_DE_INVALID_WINDRVR_HANDLE "INVALID WINDRIVER HANDLE RETURNED"
318 #define STR_DE_INVALID_WINDRVR_VERSION "INVALID WINDRIVER VERSION"
319 #define STR_DE_BAD_WINDRVR_BOARD_INIT "WINDRIVER BOARD INITIALIZATION FAILURE"
320 #define STR_DE_OPERATION_TIMED_OUT "OPERATION TIMED OUT"
321 #define STR_DE_INVALID_WINDRVR_KP "KERNEL PLUGIN INITIALIZATION FAILURE"
322 #define STR_DE_THREAD_FAILURE "THREAD INITIALIZATION FAILURE"
323 #define STR_DE_DALI_STREAMING "DALI STREAMING OPERATION IN PROGRESS"
324 #define STR_DE_DALI_NOT_STREAMING "NO DALI STREAMING OPERATION IN PROGRESS"
325 #define STR_DE_DALI_NOT_SUPPORTED "DALI FUNCTIONS SUPPORTED IN WIN32 AND LINUX ONLY"
326 
327 
328 /*/////////////////////////////////////////////////////////////////
335 
336 /*/////////
337 // DSCCB //
339 
340 typedef struct
341 {
342  /*//////////////////////////////////////////////////////////
343  // These members are filled automatically by dscInitBoard //
344  // THE USER DOES NOT HAVE TO FILL THESE IN MANUALLY //
346  BYTE boardtype; /* Contains the boardtype constant */
347  DSCB boardnum; /* The handle to the board */
348 
349  /*///////////////////////////////////////////////////////////
350  // The user must fill in everything below that pertains to //
351  // board before the call to dscInitBoard //
353  WORD base_address; /* Base address of the board */
354  BYTE dma_level; /* DMA level of the board */
355  LONG clock_freq; /* Clock frequency in hertz */
356 
357  /*////////////////////////////////////////////////////
358  // Use int_level for boards with only one interrupt //
360  BYTE int_level; /* Interrupt level of the board */
361 
362  /*//////////////////////////////////////////////////////
363  // For boards that use all three interrupts, you must //
364  // use these three variables, not int_level //
366  BYTE int_level1; /* Interrupt levels for boards with */
367  BYTE int_level2; /* More than one interrupt */
369 
370  /*////////////////////////////////////////////
371  // For DMM32 revision checking, FPGA code //
373  WORD fpga;
374 
375  /*////////////////
376  // OMM specific //
378  BYTE interruptConf;
379  BYTE counterConf;
380 
381  /*///////////////////////////////
382  // RMM416 and RMM1612 specific //
384  BOOL RMM_external_trigger; /* Enable/disable external trigger */
385  BOOL RMM_mode_16bit; /* Set D/A ports to 16-bit */
386 
387  /*////////////////
388  // RMM specific //
390  BOOL RMM_DAC_0_3_external_enable;
391  BOOL RMM_DAC_4_7_external_enable;
392  BOOL RMM_external_trigger_c3;
393 
394  /*////////////////
395  // SMM specific //
397  BYTE SMM_AD_resolution; /* 12 or 14 bit */
398 
399  /*/////////////////
400  // EMM specific //
402  WORD EMM_IOAddr[8]; /* IO addresses for up to eight ports */
403  WORD EMM_Interrupt[8]; /* Interrupts for up to eight ports */
404 
405  /*/////////////////
406  // PROM specific //
408  BYTE clkfrq0; /* 0 = 10Mhz, 1 = 1MHz */
409  BYTE clkfrq1; /* 0 = 10Mhz, 1 = 100KHz */
410  BYTE clksel1; /* 0 = internal oscillator, frequency set by ckfrq1. 1 = external clock input CLK1 */
411 
412  /*/////////////////
413  // DALI specific //
415 
416  char DALI_host[128];
417  WORD DALI_port;
418  char DALI_username[24];
419  char DALI_password[24];
420 
421 } DSCCB;
422 
423 
424 /*/////////////////
425 // DSCADSETTINGS //
427 
428 typedef struct
429 {
430 
431  BYTE current_channel; /* INPUT: Which channel to read AD samples from */
432  BYTE gain; /* INPUT: 0 = gain of 1, 1 = gain of 2, 2 = gain of 4, 3 = gain of 8 */
433  BYTE range; /* INPUT: 0 = 5V range, 1 = 10V range */
434  BYTE polarity; /* INPUT: 0 = bipolar, 1 = unipolar */
435  BYTE load_cal; /* INPUT: 0 = do not load calibration values, 1 = load */
437 
438 } DSCADSETTINGS;
439 
440 
441 /*/////////////
442 // DSCADSCAN //
444 
445 typedef struct
446 {
447 
448  BYTE low_channel; /* INPUT: Low channel of the scan */
449  BYTE high_channel; /* INPUT: High channel of the scan */
450  DSCSAMPLE *sample_values; /* I/O: The user must point this to memory that has been allocated and ready to accept (high - low + 1) DSCADSAMPLE values into it */
451  BYTE gain; /* Obsolete */
452 
453 } DSCADSCAN;
454 
455 
456 /*/////////////
457 // REGPARAMS //
459 
460 /* This structure is for internal driver use */
461 
462 typedef struct
463 {
464 
467 
468 } REGPARAMS;
469 
470 
471 /*/////////////
472 // ERRPARAMS //
474 
475 typedef struct
476 {
477 
478  BYTE ErrCode; /* OUTPUT: The numerical value of the last error */
479  char *errstring; /* OUTPUT: A string description of the last error */
480 
481 } ERRPARAMS;
482 
483 
484 /*/////////////
485 // DSCAIOINT //
487 
488 typedef struct
489 {
490 
491  DWORD num_conversions; /* INPUT: total # of conversions to write to sample_values, unless cycling. */
492  FLOAT conversion_rate; /* INPUT: interrupts per second */
493  BOOL cycle; /* INPUT: when done with num_conversions, restart at the beginning of the buffer? */
494  BOOL internal_clock; /* INPUT: use the internal clock (82c54) ? */
495  BYTE low_channel; /* INPUT: lowest channel number to perform A/D conversion on */
496  BYTE high_channel; /* INPUT: highest channel number to perform A/D conversion on */
497  BOOL external_gate_enable; /* INPUT: A/D dmm, dmm-16 only */
498  BOOL internal_clock_gate; /* INPUT: Set internal gating on or off (refer to manual) */
499  WORD *sample_values; /* I/O: pointer to the user's sample buffer */
500  BOOL fifo_enab; /* INPUT: Fifo operation flag for int sample/scan modes. */
501  WORD fifo_depth; /* INPUT: Fifo depth (if fifo mode used) */
502  DWORD dump_threshold; /* INPUT: Threshold at which to dump the sample buffer */
503  BOOL channel_align; /* INPUT: if true, the interrupt will automatically realign the channels each cycle */
504  BYTE clksource; /* INPUT: 0 for 100KHz, 1 for 10MHz internal clock source.*/
505 
506 } DSCAIOINT;
507 
508 
509 /*//////////////////////////////
510 // DSCAUTOCAL, DSCADCALPARAMS //
512 
513 typedef struct
514 {
515 
516  BYTE adrange; /* INPUT: A/D Range to calibrate (use 0xFF for all ranges) */
517  BYTE boot_adrange; /* INPUT: When cal'ed, this adrange is stored to BOOT values */
518  FLOAT ad_offset, ad_gain; /* OUTPUT: Difference between target and measured vals. */
519  DFLOAT target_values[8]; /* OUTPUT: Target values read from EEPROM */
520 
521  BOOL use_eeprom; /* Obsolete, but kept in for backwards compatibility */
522  /* To set the reference values, use dsc(S/G)etReferenceVoltages */
523 
525 
526 
527 /*////////////////
528 // SETCALPARAMS //
530 
531 /* This structure is here for backwards compatibility, but is no longer used */
532 
533 typedef struct
534 {
535 
538 
539 } SETCALPARAMS;
540 
541 
542 /*///////////
543 // DSCDACS //
545 
546 typedef struct
547 {
548 
549  BOOL channel_enable[16]; /* INPUT: Which to update. channel_enable[x] = 1 means that output_codes[x] is valid */
550  DSCDACODE *output_codes; /* INPUT: A pointer to the user's array of DA codes */
551 
552 } DSCDACS;
553 
554 
555 /*////////////
556 // DAPARAMS //
558 
559 typedef struct
560 {
561 
562  BYTE channel; /* INPUT: Which DA channel to modify */
563  DSCDACODE output_code; /* INPUT: The new output value for the DA channel */
564 
565 } DAPARAMS;
566 
567 
568 /*//////////////////
569 // DSCDACALPARAMS //
571 
572 typedef struct
573 {
574 
575  BOOL fixed; /* OUTPUT: reports the "fixed" status that was detected. fixed=FALSE means programmable. */
576  BOOL polarity; /* OUTPUT: Bipolar=FALSE, Unipolar=TRUE */
577  DFLOAT darange; /* INPUT: D/A range to calibrate */
578  FLOAT offset; /* OUTPUT: Difference between target and measured vals. */
579  FLOAT gain; /* OUTPUT: Difference between target and measured vals. */
580 
581  /*///////////////////////////
582  // For DMMAT specific use: //
584  BOOL ch0pol, ch0prog, ch0ext; /* cho0pol=true: bipolar, ch0prog=true: programmable, ch0ext=true: external; */
585  BOOL ch1pol, ch1prog, ch1ext;
587 
588 } DSCDACALPARAMS; /* Single D/A channel */
589 
590 
591 /*////////
592 // DSCS //
594 
595 typedef struct
596 {
597 
598  BYTE op_type; // OUTPUT: reports the current operation type. Will usually be either OP_TYPE_NONE or OP_TYPE_INT
599  DWORD transfers; // OUTPUT: the number of transfers the operation has performed in the current cycle
600  DWORD total_transfers; // OUTPUT: the total number of transfers performed during every cycle
601  DWORD overflows; // OUTPUT: increments this value each time an overflow occurs
602 
603  /* The following are for backwards compatibility, not used anymore */
609 
610 } DSCS;
611 
612 /*//////////////////////
613 // DSCUSERINTFUNCTION //
615 
616 typedef struct
617 {
618 
619  DSCUserInterruptFunction func; /* INPUT: A pointer to the user's interrupt function */
620  BYTE int_mode; /* INPUT: Which user int mode to use */
621 
623 
624 
625 /*//////////////
626 // DSCUSERINT //
628 
629 /* These input values are board specific, please refer to the user's manual */
630 
631 typedef struct
632 {
637 
638 } DSCUSERINT;
639 
640 /*/////////
641 // DSCCS //
643 
644 typedef struct
645 {
646 
647  DWORD value; /* OUTPUT: Counter readback value */
648  BYTE status; /* OUTPUT: Counter readback status */
649 
650 } DSCCS;
651 
652 
653 /*/////////
654 // DSCCR //
656 
657 /* Used only in dscCounterRead, otherwise mostly for internal driver use */
658 
659 
660 typedef struct
661 {
662 
665  DWORD counter_data; /* Counter write data */
666  DSCCS counter0; /* Counter read data */
669 
670 } DSCCR;
671 
672 
673 /*/////////////
674 // DIOPARAMS // this structure is for internal use only
676 
677 /* This structure is for internal driver use */
678 
679 typedef struct
680 {
681 
685 
686 } DIOPARAMS;
687 
688 
689 /*/////////////
690 // DSCDIOINT //
692 
693 typedef struct
694 {
695 
696  WORD num_transfers; /* INPUT: Number of conversions to perform */
697  BYTE port; /* INPUT: for boards w/ >8 bits of dio */
698  BYTE size; /* INPUT: 0-7 for bits 0-7, 8 for full byte, 16 for word */
699  BOOL cycle; /* INPUT: Set to TRUE to repeat the operation continuously */
700  BOOL internal_clock; /* INPUT: Set to TRUE to use the internal clock as a trigger, FALSE to use an external trigger */
701  BYTE mode; /* INPUT: for Garnet only */
702  BYTE source; /* INPUT: for Onyx only */
703  BYTE *digital_values; /* INPUT: The array that holds the DIO values to send */
704  DWORD dump_threshold; /* INPUT: Threshold at which to dump the sample buffer */
705 
706 } DSCDIOINT;
707 
708 /*/////////////
709 // DSCEMMDIO // this structure is for use with the EMMDIO function dscEMMDIO[G/S]etState
711 
712 typedef struct
713 {
714 
715  BYTE DIOpins[6]; /* I/O: contains values to write to pins, or values read from pins - based on use_DIOpins */
716  BOOL lock_port[6]; /* INPUT: values for the lock bits at base+7 */
717  BYTE edge_polarity[3]; /* OUTPUT: contains the polarity to each pin on ports 0-2 (each BYTE is one port w/ 8 pins) 0=negative, 1=positive */
718  BYTE edge_detect[3]; /* INPUT: set edge detection enabled (1) or disabled (0) for the 8 pins on each port 0-2 */
719  BYTE edge_detect_clear[3]; /* INPUT: set to 1 for ech port 0-2 to clear the edge detection values */
720  BYTE edge_detect_int[3]; /* OUTPUT: read-only: specifies if an edge was detected on the pin since its port was last cleared */
721  BOOL use_DIOpins; /* INPUT: 0 = ignore DIOpins, 1 = use DIOpins */
722  BOOL use_lock_port; /* INPUT: 0 = ignore lock_port, 1 = use lock_port */
723  BOOL use_edge_polarity; /* INPUT: 0 = ignore edge_polarity, 1 = use edge_polarity */
724  BOOL use_edge_detect; /* INPUT: 0 = ignore edge_detect, 1 = use edge_detect */
725  BYTE interrupt_status; /* OUTPUT: read-only: corresponds to base+6, bits 0-2 are interrupt status for port 0-2 */
726 
727 } DSCEMMDIO;
728 
729 
730 /*///////////////////
731 // EMMDIOCLEAREDGE //
733 
734 typedef struct
735 {
736 
737  BOOL use_lock_port; /* INPUT: 0 = ignore lock_port, 1 = use lock_port */
738  BOOL lock_port[6]; /* INPUT: values for the lock bits at base+7 */
739  BYTE edge_detect_clear[3]; /* INPUT: set to 1 for ech port 0-2 to clear the edge detection values */
740 
742 
743 /*///////////////////
744 // DSCDALISETTINGS // this structure for DALI channel settings
746 
747 enum { DALI_UNKNOWN, DALI_AIN, DALI_AOUT, DALI_DIN, DALI_DOUT, DALI_DANY };
748 
749 typedef struct
750 {
751  /* All output values */
752 
753  BYTE gain; /* Gain for board associated with this DALI channel */
754  BYTE range; /* Range for board associated with this DALI channel */
755  BYTE polarity; /* Polarity for board associated with this DALI chanel */
756  BYTE type; /* DALI_AOUT, DALI_AIN, DALI_DOUT, DALI_DIN, DALI_DANY */
757  BYTE board; /* The board macro of the real remote PC/104 board */
758  DWORD min; /* Minimum engineering units possible on this channel */
759  DWORD max; /* Maxmimum engineering units possible on this channel */
760  double vmin; /* Minimum voltage units possible on this channel */
761  double vmax; /* Maximum voltage units possible on this channel */
762 
764 
765 
766 /*///////////////
767 // DSCWATCHDOG //
769 
770 typedef struct
771 {
772 
773  WORD wd1; /* INPUT: WD1 16-bit timer value (runs at ~32KHz - max 2 seconds) */
774  BYTE wd2; /* INPUT: WD2 8-bit timer value (runs at ~32KHz - max 7.2ms) */
775  BYTE options; /* INPUT: option mask (e.g. "PROM_WD_TRIGGER_SMI | PROM_WD_TRIGGER_NMI") */
776 
777 } DSCWATCHDOG;
778 
779 /*/////////////////////////////////////////////////////////////////
786 
787 /*////////////////////////////
788 // Error-Handling Functions //
790 
791 BYTE DSCUDAPICALL dscGetLastError(ERRPARAMS* errparams);
792 DSCUDAPICALL char* dscGetErrorString(BYTE error_code);
793 
794 /*////////////////////////////
795 // Initialization Functions //
797 
798 BYTE DSCUDAPICALL dscInit(WORD version);
799 BYTE DSCUDAPICALL dscFree(void);
800 BYTE DSCUDAPICALL dscInitBoard(BYTE boardtype, DSCCB* dsccb, DSCB* board);
801 BYTE DSCUDAPICALL dscFreeBoard(DSCB board);
802 
803 /*/////////////////
804 // A/D Functions //
806 
807 BYTE DSCUDAPICALL dscADSetSettings(DSCB board, DSCADSETTINGS* settings);
808 BYTE DSCUDAPICALL dscADSetChannel(DSCB board, BYTE low_channel, BYTE high_channel);
809 BYTE DSCUDAPICALL dscADSample(DSCB board, DSCSAMPLE* sample);
810 BYTE DSCUDAPICALL dscADSampleInt(DSCB board, DSCAIOINT* dscaioint);
811 BYTE DSCUDAPICALL dscADScan(DSCB board, DSCADSCAN* dscadscan, DSCSAMPLE* sample_values);
812 BYTE DSCUDAPICALL dscADScanInt(DSCB board, DSCAIOINT* dscaioint);
813 
814 /*/////////////////
815 // D/A Functions //
817 
818 BYTE DSCUDAPICALL dscDASetPolarity(DSCB board, BYTE polarity);
819 BYTE DSCUDAPICALL dscDAConvert(DSCB board, BYTE channel, DSCDACODE output_code);
820 BYTE DSCUDAPICALL dscDAConvertScan(DSCB board, DSCDACS *dscdacs);
821 BYTE DSCUDAPICALL dscDAConvertScanInt(DSCB board, DSCAIOINT *dscaioint);
822 
823 /*/////////////////
824 // DIO Functions //
826 
827 BYTE DSCUDAPICALL dscDIOSetConfig(DSCB board, BYTE* config_bytes);
828 BYTE DSCUDAPICALL dscDIOInputByte(DSCB board, BYTE port, BYTE* digital_value);
829 BYTE DSCUDAPICALL dscDIOOutputByte(DSCB board, BYTE port, BYTE digital_value);
830 BYTE DSCUDAPICALL dscDIOInputBit(DSCB board,BYTE port,BYTE bit,BYTE *digital_value);
831 BYTE DSCUDAPICALL dscDIOOutputBit(DSCB board,BYTE port, BYTE bit,BYTE digital_value);
832 BYTE DSCUDAPICALL dscDIOSetBit(DSCB board,BYTE port,BYTE bit);
833 BYTE DSCUDAPICALL dscDIOClearBit(DSCB board,BYTE port,BYTE bit);
834 BYTE DSCUDAPICALL dscDIOInputInt(DSCB board,DSCDIOINT *dscdioint);
835 BYTE DSCUDAPICALL dscDIOOutputInt(DSCB board,DSCDIOINT *dscdioint);
836 BYTE DSCUDAPICALL dscDMM32DIOOutputByte(DSCB board, BYTE port, BYTE digital_value);
837 BYTE DSCUDAPICALL dscDMM32DIOInputByte(DSCB board, BYTE port, BYTE *digital_value);
838 
839 /*/////////////////////
840 // Counter Functions //
842 
843 BYTE DSCUDAPICALL dscCounterSetRate(DSCB board, float hertz);
844 BYTE DSCUDAPICALL dscCounterDirectSet(DSCB board, BYTE code, WORD data, BYTE ctr_number);
845 BYTE DSCUDAPICALL dscCounterRead(DSCB board, DSCCR* dsccr);
846 
847 /*/////////////////////////
848 // Calibration Functions //
850 
851 BYTE DSCUDAPICALL dscSetCalMux(DSCB board, BOOL on);
852 BYTE DSCUDAPICALL dscADAutoCal(DSCB board, DSCADCALPARAMS* params);
853 BYTE DSCUDAPICALL dscDAAutoCal(DSCB board, DSCDACALPARAMS* params);
854 BYTE DSCUDAPICALL dscADCalVerify(DSCB board, DSCADCALPARAMS* params);
855 BYTE DSCUDAPICALL dscDACalVerify(DSCB board, DSCDACALPARAMS* params);
856 BYTE DSCUDAPICALL dscGetReferenceVoltages(DSCB board, DFLOAT* refs);
857 BYTE DSCUDAPICALL dscSetReferenceVoltages(DSCB board, DFLOAT* refs);
858 
859 /*//////////////////////
860 // Register Functions //
862 
863 BYTE DSCUDAPICALL dscRegisterRead(DSCB board, WORD address, BYTE* data);
864 BYTE DSCUDAPICALL dscRegisterWrite(DSCB board, WORD address, BYTE data);
865 
866 /*///////////////////
867 // Misc. Functions //
869 
870 BYTE DSCUDAPICALL dscSleep(DWORD ms);
871 BYTE DSCUDAPICALL dscGetEEPROM(DSCB board, DWORD address, BYTE* data);
872 BYTE DSCUDAPICALL dscSetEEPROM(DSCB board, DWORD address, BYTE data);
873 BYTE DSCUDAPICALL dscGetStatus(DSCB board, DSCS* status);
874 BYTE DSCUDAPICALL dscCancelOp(DSCB board);
875 BYTE DSCUDAPICALL dscPauseOp(DSCB board);
876 BYTE DSCUDAPICALL dscResumeOp(DSCB board);
877 BYTE DSCUDAPICALL dscSetUserInterruptFunction(DSCB board, DSCUSERINTFUNCTION * dscuserintfunc);
878 BYTE DSCUDAPICALL dscUserInt(DSCB board, DSCUSERINT * dscuserint, DSCUserInterruptFunction function);
879 BYTE DSCUDAPICALL dscClearUserInterruptFunction(DSCB board);
880 BYTE DSCUDAPICALL dscGetBoardMacro(char* boardtype, BYTE* macro);
881 BYTE DSCUDAPICALL dscGetFPGA(DSCB board, WORD* fpga);
882 
883 /*////////////////////
884 // EMMDIO Functions //
886 
887 BYTE DSCUDAPICALL dscEMMDIOGetState(DSCB board, DSCEMMDIO* state);
888 BYTE DSCUDAPICALL dscEMMDIOSetState(DSCB board, DSCEMMDIO* state);
889 BYTE DSCUDAPICALL dscEMMDIOResetInt(DSCB board, DSCEMMDIORESETINT* edge);
890 /*////////////////////////
891 // PROMETHEUS Functions //
893 
894 BYTE DSCUDAPICALL dscWatchdogEnable(DSCB board, WORD wd1, BYTE wd2, SDWORD options);
895 BYTE DSCUDAPICALL dscWatchdogDisable(DSCB board);
896 BYTE DSCUDAPICALL dscWatchdogTrigger(DSCB board);
897 
898 /*////////////////////
899 // DALI Functions //
901 BYTE DSCUDAPICALL dscDALIStartStreaming(DSCB board, double frequency);
902 BYTE DSCUDAPICALL dscDALIStopStreaming(DSCB board);
903 BYTE DSCUDAPICALL dscDALIGetStreamingResponse(DSCB board, long *values, BYTE count);
904 BYTE DSCUDAPICALL dscDALIGetSettings(DSCB board, DSCDALISETTINGS* settings);
905 BYTE DSCUDAPICALL dscDALIGetBoardMacro(DSCB board, BYTE *macro);
906 
907 /*/////////////////////
908 // QMM SECTION BELOW //
910 
911 /* QMM counter group */
912 #define QMM_COUNTER_GROUP_1 1
913 #define QMM_COUNTER_GROUP_2 2
914 
915 /* QMM fout/counter source */
916 #define QMM_SOURCE_E1_TC_NM1 0
917 #define QMM_SOURCE_SRC1 1
918 #define QMM_SOURCE_SRC2 2
919 #define QMM_SOURCE_SRC3 3
920 #define QMM_SOURCE_SRC4 4
921 #define QMM_SOURCE_SRC5 5
922 #define QMM_SOURCE_GATE1 6
923 #define QMM_SOURCE_GATE2 7
924 #define QMM_SOURCE_GATE3 8
925 #define QMM_SOURCE_GATE4 9
926 #define QMM_SOURCE_GATE5 10
927 #define QMM_SOURCE_F1_4MHZ 11
928 #define QMM_SOURCE_F2_400KHZ 12
929 #define QMM_SOURCE_F3_40KHZ 13
930 #define QMM_SOURCE_F4_4KHZ 14
931 #define QMM_SOURCE_F5_400HZ 15
932 
933 /* QMM time of day mode */
934 #define QMM_TOD_DISABLED 0
935 #define QMM_TOD_DIVIDE_BY_5 1
936 #define QMM_TOD_DIVIDE_BY_6 2
937 #define QMM_TOD_DIVIDE_BY_10 3
938 
939 /* QMM gating control */
940 #define QMM_NO_GATING 0
941 #define QMM_ACTIVE_HIGH_TC_NM1 1
942 #define QMM_ACTIVE_HIGH_LEVEL_GATE_NP1 2
943 #define QMM_ACTIVE_HIGH_LEVEL_GATE_NM1 3
944 #define QMM_ACTIVE_HIGH_LEVEL_GATE_N 4
945 #define QMM_ACTIVE_LOW_LEVEL_GATE_N 5
946 #define QMM_ACTIVE_HIGH_EDGE_GATE_N 6
947 #define QMM_ACTIVE_LOW_EDGE_GATE_N 7
948 
949 /* QMM output control */
950 #define QMM_INACTIVE_OUTPUT_LOW 0
951 #define QMM_ACTIVE_HIGH_PULSE_ON_TC 1
952 #define QMM_TOGGLE_ON_TC 2
953 #define QMM_INACTIVE_OUTPUT_HIGH 4
954 #define QMM_ACTIVE_LOW_PULSE_ON_TC 5
955 
956 /* QMM counter actions */
957 #define QMM_ACTION_NONE 0
958 #define QMM_ACTION_ARM 1
959 #define QMM_ACTION_LOAD 2
960 #define QMM_ACTION_LOAD_AND_ARM 3
961 #define QMM_ACTION_DISARM_AND_SAVE 4
962 #define QMM_ACTION_SAVE 5
963 #define QMM_ACTION_DISARM 6
964 
965 /* QMM special counter actions */
966 #define QMM_SPECIAL_CLEAR_TOGGLE_OUTPUT 0
967 #define QMM_SPECIAL_SET_TOGGLE_OUTPUT 1
968 #define QMM_SPECIAL_STEP_COUNTER 2
969 #define QMM_SPECIAL_PROGRAM_ALARM 3
970 
971 /* QMM frequency intervals */
972 #define QMM_INTERVAL_1MS_1KHZ 0
973 #define QMM_INTERVAL_10MS_100HZ 1
974 #define QMM_INTERVAL_100MS_10HZ 2
975 #define QMM_INTERVAL_1S_1HZ 3
976 #define QMM_INTERVAL_10S_01HZ 4
977 
978 /* QMM master mode register */
979 typedef struct
980 {
981 
988 
989 } DSCQMM_MMR;
990 
991 /* QMM counter mode register */
992 typedef struct
993 {
994 
1005 
1006 } DSCQMM_CMR;
1007 
1008 /* QMM multiple counter control */
1009 typedef struct
1010 {
1011 
1016 
1017 } DSCQMM_MCC;
1018 
1019 /* QMM special counter functions */
1020 typedef struct
1021 {
1022 
1026 
1027 } DSCQMM_SCF;
1028 
1029 /* QMM pulse width modulation control */
1030 typedef struct
1031 {
1032 
1037 
1042 
1043 } DSCQMM_PWM;
1044 
1045 
1046 /* QMM Function Prototypes */
1047 
1049 
1050 BYTE DSCUDAPICALL dscQMMSetMMR(DSCB board, DSCQMM_MMR* dscqmmmmr);
1051 BYTE DSCUDAPICALL dscQMMSetCMR(DSCB board, DSCQMM_CMR* dscqmmcmr);
1052 BYTE DSCUDAPICALL dscQMMCounterControl(DSCB board, DSCQMM_MCC* dscqmmmcc, BYTE * status);
1053 BYTE DSCUDAPICALL dscQMMSingleCounterControl(DSCB board, BYTE counter, BYTE action);
1054 
1055 BYTE DSCUDAPICALL dscQMMSetLoadRegister(DSCB board, BYTE counter, WORD value);
1056 BYTE DSCUDAPICALL dscQMMSetHoldRegister(DSCB board, BYTE counter, WORD value);
1057 BYTE DSCUDAPICALL dscQMMReadHoldRegister(DSCB board, BYTE counter, WORD* value);
1058 
1060 BYTE DSCUDAPICALL dscQMMMeasureFrequency(DSCB board, BYTE interval, BYTE source, FLOAT* freq);
1061 BYTE DSCUDAPICALL dscQMMMeasurePeriod(DSCB board, BYTE frequency, FLOAT* period);
1062 
1064 
1065 // END QMM SECTION
1066 
1067 
1068 #ifdef __cplusplus
1069 } /* Closes the extern "C" */
1070 #endif
1071 
1072 #endif /* #ifndef _DSCUD_H */
1073 
BYTE range
Definition: DSCUD.H:754
BOOL internal_clock
Definition: DSCUD.H:700
FLOAT duty_cycle
Definition: DSCUD.H:1036
DWORD counter_data
Definition: DSCUD.H:665
#define BOOL
Definition: DSCUD.H:100
BYTE DSCUDAPICALL dscQMMMeasurePeriod(DSCB board, BYTE frequency, FLOAT *period)
BYTE port
Definition: DSCUD.H:697
DSCDACODE output_code
Definition: DSCUD.H:563
BYTE DSCUDAPICALL dscQMMReadHoldRegister(DSCB board, BYTE counter, WORD *value)
BYTE options
Definition: DSCUD.H:775
DWORD input_freq
Definition: DSCUD.H:1038
BYTE range
Definition: DSCUD.H:433
BOOL RMM_mode_16bit
Definition: DSCUD.H:385
BYTE counter
Definition: DSCUD.H:1034
BYTE reload_source
Definition: DSCUD.H:1000
BYTE data
Definition: DSCUD.H:466
BOOL fifo_enab
Definition: DSCUD.H:500
BYTE DSCUDAPICALL dscQMMSingleCounterControl(DSCB board, BYTE counter, BYTE action)
BYTE clksource
Definition: DSCUD.H:635
BYTE low_channel
Definition: DSCUD.H:495
BYTE action
Definition: DSCUD.H:1024
WORD load_reg
Definition: DSCUD.H:1039
BYTE polarity
Definition: DSCUD.H:434
Definition: DSCUD.H:595
BYTE DSCUDAPICALL dscQMMSpecialCounterFunction(DSCB board, DSCQMM_SCF *dscqmmscf)
BYTE chan
Definition: DSCUD.H:536
Definition: DSCUD.H:660
BOOL ch1prog
Definition: DSCUD.H:585
BYTE size
Definition: DSCUD.H:698
FLOAT output_freq
Definition: DSCUD.H:1035
BYTE DSCUDAPICALL dscQMMSetLoadRegister(DSCB board, BYTE counter, WORD value)
BYTE special_gate
Definition: DSCUD.H:999
BYTE clksel1
Definition: DSCUD.H:410
BYTE source
Definition: DSCUD.H:702
BYTE counter
Definition: DSCUD.H:995
BYTE clksource
Definition: DSCUD.H:504
BYTE group1_counter_select
Definition: DSCUD.H:1013
BYTE load_cal
Definition: DSCUD.H:435
BYTE DSCUDAPICALL dscQMMCounterControl(DSCB board, DSCQMM_MCC *dscqmmmcc, BYTE *status)
#define DSCUDAPICALL
Definition: DSCUD.H:127
BYTE group2_action
Definition: DSCUD.H:1014
BYTE intsource
Definition: DSCUD.H:633
#define LONG
Definition: DSCUD.H:85
char * errstring
Definition: DSCUD.H:479
#define WORD
Definition: DSCUD.H:65
BYTE clkfrq1
Definition: DSCUD.H:409
DFLOAT darange
Definition: DSCUD.H:577
BYTE wd2
Definition: DSCUD.H:774
BYTE fout_source
Definition: DSCUD.H:984
double vmin
Definition: DSCUD.H:760
BYTE count_source
Definition: DSCUD.H:998
FLOAT offset
Definition: DSCUD.H:578
BOOL cal_enable
Definition: DSCUD.H:537
BOOL use_DIOpins
Definition: DSCUD.H:721
BYTE DSCUDAPICALL dscQMMSetCMR(DSCB board, DSCQMM_CMR *dscqmmcmr)
BYTE counter_group
Definition: DSCUD.H:982
BYTE digital_value
Definition: DSCUD.H:683
BYTE int_level2
Definition: DSCUD.H:367
BOOL use_lock_port
Definition: DSCUD.H:722
#define DSCB
Definition: DSCUD.H:140
BYTE dma_level
Definition: DSCUD.H:354
BYTE DSCUDAPICALL dscQMMReset(DSCB board)
LONG clock_freq
Definition: DSCUD.H:355
BYTE * digital_values
Definition: DSCUD.H:703
BYTE polarity
Definition: DSCUD.H:755
BYTE status
Definition: DSCUD.H:648
BYTE int_level
Definition: DSCUD.H:606
double vmax
Definition: DSCUD.H:761
BOOL use_eeprom
Definition: DSCUD.H:521
BYTE gain
Definition: DSCUD.H:432
DSCB boardnum
Definition: DSCUD.H:347
BYTE group2_counter_select
Definition: DSCUD.H:1015
BYTE gain
Definition: DSCUD.H:451
BYTE tod_mode
Definition: DSCUD.H:987
BYTE DSCUDAPICALL dscQMMMeasureFrequency(DSCB board, BYTE interval, BYTE source, FLOAT *freq)
Definition: DSCUD.H:644
DWORD min
Definition: DSCUD.H:758
BYTE count_direction
Definition: DSCUD.H:1003
BOOL use_edge_detect
Definition: DSCUD.H:724
BYTE output_control
Definition: DSCUD.H:1004
BOOL external_gate_enable
Definition: DSCUD.H:497
BOOL channel_align
Definition: DSCUD.H:503
WORD * sample_values
Definition: DSCUD.H:499
BYTE group1_action
Definition: DSCUD.H:1012
BYTE int_level3
Definition: DSCUD.H:368
BYTE boot_adrange
Definition: DSCUD.H:517
BYTE DSCUDAPICALL dscQMMPulseWidthModulation(DSCB board, DSCQMM_PWM *dscqmmpwm)
BYTE count_type
Definition: DSCUD.H:1002
BYTE bit
Definition: DSCUD.H:684
BYTE control_code
Definition: DSCUD.H:663
BOOL analog
Definition: DSCUD.H:608
FLOAT gain
Definition: DSCUD.H:579
BYTE high_channel
Definition: DSCUD.H:496
BYTE active_source_edge
Definition: DSCUD.H:997
FLOAT ad_offset
Definition: DSCUD.H:518
BYTE compare2_enable
Definition: DSCUD.H:986
WORD fifo_depth
Definition: DSCUD.H:501
FLOAT rate
Definition: DSCUD.H:636
WORD base_address
Definition: DSCUD.H:605
BYTE interrupt_status
Definition: DSCUD.H:725
BYTE DSCUDAPICALL dscQMMSetMMR(DSCB board, DSCQMM_MMR *dscqmmmmr)
BYTE high_channel
Definition: DSCUD.H:449
BYTE gating_control
Definition: DSCUD.H:996
BYTE counter
Definition: DSCUD.H:1023
BYTE scan_interval
Definition: DSCUD.H:436
BOOL cycle
Definition: DSCUD.H:699
DSCCS counter2
Definition: DSCUD.H:668
#define FLOAT
Definition: DSCUD.H:90
#define DWORD
Definition: DSCUD.H:75
#define BYTE
Definition: DSCUD.H:55
DWORD address
Definition: DSCUD.H:465
BOOL polarity
Definition: DSCUD.H:576
BYTE hit_extreme
Definition: DSCUD.H:1041
WORD alarm_value
Definition: DSCUD.H:1025
BYTE dma_level
Definition: DSCUD.H:607
DWORD dump_threshold
Definition: DSCUD.H:502
BYTE init
Definition: DSCUD.H:1033
BYTE compare1_enable
Definition: DSCUD.H:985
DWORD max
Definition: DSCUD.H:759
FLOAT conversion_rate
Definition: DSCUD.H:492
BYTE port
Definition: DSCUD.H:682
WORD hold_reg
Definition: DSCUD.H:1040
DWORD dump_threshold
Definition: DSCUD.H:704
Definition: DSCUD.H:546
DSCCS counter1
Definition: DSCUD.H:667
DSCDACODE * output_codes
Definition: DSCUD.H:550
BYTE board
Definition: DSCUD.H:757
#define DSCDACODE
Definition: DSCUD.H:119
BOOL internal_clock
Definition: DSCUD.H:494
FLOAT ref
Definition: DSCUD.H:586
#define DFLOAT
Definition: DSCUD.H:95
BYTE DSCUDAPICALL dscQMMSetHoldRegister(DSCB board, BYTE counter, WORD value)
BYTE output
Definition: DSCUD.H:604
BOOL cycle
Definition: DSCUD.H:493
BYTE counter_number
Definition: DSCUD.H:664
BYTE mode
Definition: DSCUD.H:701
BYTE counter
Definition: DSCUD.H:634
struct DSCAUTOCAL DSCADCALPARAMS
BOOL use_edge_polarity
Definition: DSCUD.H:723
#define DSCSAMPLE
Definition: DSCUD.H:115
DSCSAMPLE * sample_values
Definition: DSCUD.H:450
BYTE fout_divider
Definition: DSCUD.H:983
BYTE cycle
Definition: DSCUD.H:1001
DSCCS counter0
Definition: DSCUD.H:666
BOOL internal_clock_gate
Definition: DSCUD.H:498
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Generated on Mon Sep 18 2017 11:44:08 for DAS - Rel. 3.1.6 - 18/09/2017.